1. Field of the Invention
The present invention relates to a semiconductor device, a method for manufacturing the same, and semiconductor production equipment suitable for such manufacturing, and more particularly, the present invention relates to a semiconductor device having a multilayered semiconductor film comprised of a plurality of single-crystal layers differing in conductivity type.
2. Description of the Background
A conventional semiconductor device includes a multilayered semiconductor film composed of single-crystal silicon layers or single-crystal silicon-germanium layers. An exemplary device, known as a bipolar transistor, is disclosed in Japanese Patent Laid-open No. 41321/1998 example. The disclosed method consists of continuously forming a p-type silicon-germanium layer (the base layer) and an n-type silicon layer (the emitter layer) by epitaxial growth in the same growth chamber. This continuous growth method necessitates the switching of doping gases because the base layer and the emitter layer differ in conductivity type. This switching process is accomplished by replacing diborane (containing a p-type impurity), with phosphine (containing an n-type impurity) which are supplied with hydrogen as a carrier gas.
Likewise, a semiconductor device including a multilayered semiconductor film is disclosed in Japanese Patent Laid-open No. 299429/1993. The device includes a base layer and an emitter layer formed by epitaxial growth. The disclosed method is characterized in that after the base layer has been formed by epitaxial growth, the wafer is removed from the growth chamber and undergoes deposition of an insulating film and etching to open the emitter region. Thereafter, the wafer is again placed in the growth chamber for the growth of the emitter layer.
Another example of a semiconductor device including a multilayered semiconductor layer is disclosed in Japanese Patent Laid-open No. 79394/1998. This device is a bipolar transistor in which the emitter layer is formed by diffusion of an n-type impurity. A cross-section of this bipolar transistor is shown in FIG. 29.
In FIG. 29, there is shown a p-type silicon substrate 101 having a heavily doped n-type buried layer 125 formed in the emitter and collector regions. On the entire surface of the substrate 101, a lightly doped n-type collector layer 103 is formed by epitaxial growth. The device isolation layer 104 is formed on the surface excluding the emitter region. Other structures formed include a collector-base isolating insulation films 107 and 108, a base lead electrode 109 of p-type polycrystalline silicon, an opening in the emitter-base isolating insulation film 110, and an emitter-base isolating insulation film 111 on the side wall of the base lead electrode 109. In the opening, a lightly doped n-type collector 112 of single-crystal silicon-germanium, a p-type intrinsic base layer 113 of single-crystal silicon-germanium, and a p-type extrinsic base layer 114 of polycrystalline silicon-germanium are formed.
The extrinsic base layer is covered with the emitter-base isolating insulation films 115 and 116. Subsequently, an emitter electrode 118 of heavily doped n-type polycrystalline silicon is deposited. This step is followed by annealing to form the emitter region 119. The insulation film 120 is deposited, and openings are then made for the emitter, base, and collector. A heavily doped n-type collector lead-out layer 121 is formed, and electrodes 122, 123, and 124 are formed in the openings for the emitter, base, and collector. The collector region 102 and the device isolation layers 105 and 106 are also shown. The growth sequence for this semiconductor device is shown in FIG. 28.
According to the above-mentioned conventional technology, layers differing in conductivity type are continuously formed by epitaxial growth. A disadvantage of the conventional technology is that an impurity not intended to be doped is incorporated into the epitaxially growing layer because of the memory effect. This prevents accurate impurity control because the original dopant concentration is cancelled by the incorporated impurity. Another disadvantage is the possibility of the growing surface adsorbing unintended impurities because of the memory effect. Such impurities reduce the growth rate and deteriorate the crystal properties.
Moreover, the above-mentioned conventional multilayered semiconductor film composed of layers of single-crystal silicon or single-crystal silicon-germanium tends to capture contaminants (such as oxygen and carbon) at the interface between the single-crystal layer of a first conductivity type and the single-crystal layer of a second conductivity type. Such contaminants cause leakage current in a bipolar transistor including an emitter-base junction.
To illustrate the conventional technology for a multilayered film comprised of layers differing in conductivity type, there is shown in FIGS. 30 and 31 the germanium content and the depthwise profile of dopant concentration in the intrinsic part of a bipolar transistor. The profile shown in FIG. 30 is one which is observed when a base layer of p-type single-crystal silicon-germanium is formed, and a heavily doped n-type polycrystalline silicon is then deposited thereon. Contaminants due to growth interruption are present in the interface at a depth of D1 from the surface. In order to form the emitter layer in the single-crystal layer, it is necessary to form the pn junction at a position deeper than D1 by annealing, which causes the n-type dopant to diffuse from the heavily doped n-type polycrystalline silicon layer. This annealing may be accomplished at 900° C. for 30 seconds, for example.
As a result of annealing, the dopant profile changes from the one shown in FIG. 30 to the one shown in FIG. 31. Annealing not only causes the n-type impurity to diffuse but also causes the p-type impurity in the base layer to diffuse into the substrate. Therefore, the base width after annealing becomes D2′−D1′ in FIG. 31. This value is larger than the thickness (D2−D1) of the p-type layer measured immediately after the p-type single-crystal silicon-germanium layer has been formed. Thus, the resulting bipolar transistor has a decreased cutoff frequency. In addition, any attempt to increase the p-type dopant concentration in the base layer in order to reduce the base resistance results in a high amount of impurity diffusion due to annealing, which in turn leads to an increased base width.